Twenty microns does not leave much room for error. As advanced packaging increases functional density, the distance between neighboring devices is shrinking to dimensions that create an entirely new set of inspection challenges. In some system-in-package (SiP) applications, components approximately 200 to 300 µm tall can be separated by gaps of only 20 to 30 µm. Measuring those spaces accurately requires considerably more than simply increasing camera magnification. The challenge is optical access.

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TTM Technologies’ new UHDI facility in Syracuse, New York, provides a starting point for a broader conversation with President and CEO Edwin Roks about the future of advanced electronics manufacturing. Roks discusses his optimism for the growing demand for finer-feature PCBs, the move toward semiconductor-level dimensions, and the role of substrates, UHDI, and heterogeneous packaging in building the next generation of electronic systems.

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Advanced packaging is becoming the foundation for semiconductor scaling in the AI era. As monolithic processors encounter practical limits around reticle size, yield, memory bandwidth, power, and cost, the industry is moving toward architectures built from multiple compute dies, HBM stacks, I/O chiplets, and heterogeneous packaging solutions. The result is that semiconductor scaling is no longer determined only by how much functionality can be integrated into a single die, but by how much silicon can be integrated efficiently within a package.

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How do materials affect RF signal performance? It’s a fair question, and most will assume they already understand the answer. But this misunderstanding is exactly why so many high frequency designs underperform, require rework, or worse, fail in the field. Below the surface, where signal integrity is either preserved or destroyed, the truth is that at high frequencies, material selection matters, and that’s where most engineers get it wrong.

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